新版本uboot中mx6ull_14x14_evk_defconfig用于传统的非安全启动（Non-Secure Boot）模式，而mx6ull_14x14_evk_plugin_defconfig支持安全启动（Secure Boot），允许 U-Boot 在 ROM 加载阶段执行自定义代码，通常用于 HAB 安全启动初始化（如 DRAM 训练）。通常使用前者即可。
添加变量至顶层Makefile
在uboot根目录下的顶层Makefile中添加：
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ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
编写make用Shell，编译
touch mx6ull_14x14_evk.sh
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#!/bin/bash make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- distclean make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- mx6ull_14x14_evk_emmc_defconfig make V=1 ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j16
#ifCONFIG_IS_ENABLED(DM_GPIO) ret = gpio_request_by_name(dev, "phy-reset-gpios", 0, &priv->phy_reset_gpio, GPIOD_IS_OUT); if (ret < 0) return0; /* property is optional, don't return error! */
priv->reset_delay = dev_read_u32_default(dev, "phy-reset-duration", 1); if (priv->reset_delay > 1000) { printf("FEC MXC: phy reset duration should be <= 1000ms\n"); /* property value wrong, use default value */ priv->reset_delay = 1; }
priv->reset_post_delay = dev_read_u32_default(dev, "phy-reset-post-delay", 0); if (priv->reset_post_delay > 1000) { printf("FEC MXC: phy reset post delay should be <= 1000ms\n"); /* property value wrong, use default value */ priv->reset_post_delay = 0; } #endif
/* * vectors - Generic ARM exception table code * * Copyright (c) 1998 Dan Malek <dmalek@jlc.net> * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se> * Copyright (c) 2000 Wolfgang Denk <wd@denx.de> * Copyright (c) 2001 Alex Züpke <azu@sysgo.de> * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net> * * SPDX-License-Identifier: GPL-2.0+ */
#include <config.h>
/* ************************************************************************* * * Symbol _start is referenced elsewhere, so make it global * ************************************************************************* */
.globl _start
/* ************************************************************************* * * Vectors have their own section so linker script can map them easily * ************************************************************************* */
.section ".vectors", "ax"
/* ************************************************************************* * * Exception vectors as described in ARM reference manuals * * Uses indirect branch to allow reaching handlers anywhere in memory. * ************************************************************************* */
ENTRY(save_boot_params) b save_boot_params_ret @ back to my caller
这个函数又直接跳转到了save_boot_params_ret函数：
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save_boot_params_ret: /* * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 * mode, except if in HYP mode already */ mrsr0, cpsr@ 读取CPSR andr1, r0, #0x1f@ 提取bit0 - bit4，用于设置Cortex-A7工作模式 teqr1, #0x1a@ 判断处理器是否处于HYP模式 bicner0, r0, #0x1f@ 若不处于HYP模式，清除模式位 orrner0, r0, #0x13@ 进入SVC模式（特权） orrr0, r0, #0xc0@ 关闭FIQ和IRQ msr cpsr,r0@ 恢复CPSR
然后，继续执行：
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/* * Setup vector: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. * Continue to use ROM code vector only in OMAP4 spl) */ #if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrcp15, 0, r0, c1, c0, 0@ 读取 CP15 SCTLR 寄存器 bicr0, #CR_V@ V = 0 mcrp15, 0, r0, c1, c0, 0@ 写 CP15 SCTLR 寄存器，V清零，准备重定位向量表
/* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_cp15 @ 设置CP15相关内容 bl cpu_init_crit #endif
bl _main
这已经是跳转至main的最后一步。cpu_init_crit定义如下：
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ENTRY(cpu_init_crit) /* * Jump to board specific initialization... * The Mask ROM will have already initialized * basic memory. Go here to bump up clock rate and handle * wake up conditions. */ b lowlevel_init @ go setup pll,mux,memory ENDPROC(cpu_init_crit)
/* * A lowlevel_init function that sets up the stack to call a C function to * perform further init. * * (C) Copyright 2010 * Texas Instruments, <www.ti.com> * * Author : * Aneesh V <aneesh@ti.com> * * SPDX-License-Identifier: GPL-2.0+ */
ENTRY(lowlevel_init) /* * Setup a temporary stack. Global data is not available yet. */ ldrsp, =CONFIG_SYS_INIT_SP_ADDR bicsp, sp, #7/* 8-byte alignment for ABI compliance */ #ifdef CONFIG_SPL_DM movr9, #0 #else /* * Set up global data for boards that still need it. This will be * removed soon. */ #ifdef CONFIG_SPL_BUILD ldrr9, =gdata #else subsp, sp, #GD_SIZE bicsp, sp, #7 movr9, sp #endif #endif /* * Save the old lr(passed in ip) and the current lr to stack */ push {ip, lr}
/* * Call the very early init function. This should do only the * absolute bare minimum to get started. It should not: * * - set up DRAM * - use global_data * - clear BSS * - try to start a console * * For boards with SPL this should be empty since SPL can do all of * this init in the SPL board_init_f() function which is called * immediately after this. */ bl s_init pop {ip, pc} ENDPROC(lowlevel_init)
